Cheng-Hung Lin, Chun-Yu Chen, An-Yeu Wu. Area-Efficient Scalable MAP Processor Design for High-Throughput Multistandard Convolutional Turbo Decoding. IEEE Trans. VLSI Syst., 19(2):305-318, 2011. [doi]
@article{LinCW11-1,
title = {Area-Efficient Scalable MAP Processor Design for High-Throughput Multistandard Convolutional Turbo Decoding},
author = {Cheng-Hung Lin and Chun-Yu Chen and An-Yeu Wu},
year = {2011},
doi = {10.1109/TVLSI.2009.2032553},
url = {http://dx.doi.org/10.1109/TVLSI.2009.2032553},
tags = {design},
researchr = {https://researchr.org/publication/LinCW11-1},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {19},
number = {2},
pages = {305-318},
}