A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design

Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu, Cheng-Che Ho. A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design. IEEE Trans. on Circuits and Systems, 54-I(5):1050-1059, 2007. [doi]

Authors

Jin-Fa Lin

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Yin-Tsung Hwang

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Ming-Hwa Sheu

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Cheng-Che Ho

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