A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design

Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu, Cheng-Che Ho. A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design. IEEE Trans. on Circuits and Systems, 54-I(5):1050-1059, 2007. [doi]

Abstract

Abstract is missing.