Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu, Cheng-Che Ho. A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design. IEEE Trans. on Circuits and Systems, 54-I(5):1050-1059, 2007. [doi]
@article{LinHSH07,
title = {A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design},
author = {Jin-Fa Lin and Yin-Tsung Hwang and Ming-Hwa Sheu and Cheng-Che Ho},
year = {2007},
doi = {10.1109/TCSI.2007.895509},
url = {http://dx.doi.org/10.1109/TCSI.2007.895509},
researchr = {https://researchr.org/publication/LinHSH07},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on Circuits and Systems},
volume = {54-I},
number = {5},
pages = {1050-1059},
}