Mu-Shan Lin, Tze-Chiang Huang, Chien-Chun Tsai, King Ho Tam, Cheng-Hsiang Hsieh, Tom Chen, Wen-Hung Huang, Jack Hu, Yu-Chi Chen, Sandeep Kumar Goel, Chin-Ming Fu, Stefan Rusu, Chao-Chieh Li, Sheng-Yao Yang, Mei Wong, Shu-Chun Yang, Frank Lee. ® Chiplet Design for High Performance Computing. In 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019. pages 28, IEEE, 2019. [doi]
@inproceedings{LinHTTHCHHCGFRL19,
title = {® Chiplet Design for High Performance Computing},
author = {Mu-Shan Lin and Tze-Chiang Huang and Chien-Chun Tsai and King Ho Tam and Cheng-Hsiang Hsieh and Tom Chen and Wen-Hung Huang and Jack Hu and Yu-Chi Chen and Sandeep Kumar Goel and Chin-Ming Fu and Stefan Rusu and Chao-Chieh Li and Sheng-Yao Yang and Mei Wong and Shu-Chun Yang and Frank Lee},
year = {2019},
doi = {10.23919/VLSIC.2019.8778161},
url = {https://doi.org/10.23919/VLSIC.2019.8778161},
researchr = {https://researchr.org/publication/LinHTTHCHHCGFRL19},
cites = {0},
citedby = {0},
pages = {28},
booktitle = {2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019},
publisher = {IEEE},
isbn = {978-4-86348-720-8},
}