A Novel Hardened Design of a CMOS Memory Cell at 32nm

Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi. A Novel Hardened Design of a CMOS Memory Cell at 32nm. In Dimitris Gizopoulos, Susumu Horiguchi, Spyros Tragoudas, Mohammad Tehranipoor, editors, 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2009, 7-9 October 2009, Chicago, Illinois, USA. pages 58-64, IEEE Computer Society, 2009. [doi]

Abstract

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