Jiun-Liang Lin, Bo-Cheng Charles Lai. BRAM efficient multi-ported memory on FPGA. In VLSI Design, Automation and Test, VLSI-DAT 2015, Hsinchu, Taiwan, April 27-29, 2015. pages 1-4, IEEE, 2015. [doi]
@inproceedings{LinL15-21,
title = {BRAM efficient multi-ported memory on FPGA},
author = {Jiun-Liang Lin and Bo-Cheng Charles Lai},
year = {2015},
doi = {10.1109/VLSI-DAT.2015.7114526},
url = {http://dx.doi.org/10.1109/VLSI-DAT.2015.7114526},
researchr = {https://researchr.org/publication/LinL15-21},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {VLSI Design, Automation and Test, VLSI-DAT 2015, Hsinchu, Taiwan, April 27-29, 2015},
publisher = {IEEE},
isbn = {978-1-4799-6275-4},
}