A 7.72 Gb/s LDPC-CC decoder with overlapped architecture for pre-5G wireless communications

Chia-Lung Lin, Rong-Jie Liu, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee. A 7.72 Gb/s LDPC-CC decoder with overlapped architecture for pre-5G wireless communications. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2016, Toyama, Japan, November 7-9, 2016. pages 337-340, IEEE, 2016. [doi]

Authors

Chia-Lung Lin

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Rong-Jie Liu

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Chih-Lung Chen

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Hsie-Chia Chang

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Chen-Yi Lee

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