A 7.72 Gb/s LDPC-CC decoder with overlapped architecture for pre-5G wireless communications

Chia-Lung Lin, Rong-Jie Liu, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee. A 7.72 Gb/s LDPC-CC decoder with overlapped architecture for pre-5G wireless communications. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2016, Toyama, Japan, November 7-9, 2016. pages 337-340, IEEE, 2016. [doi]

@inproceedings{LinLCCL16-0,
  title = {A 7.72 Gb/s LDPC-CC decoder with overlapped architecture for pre-5G wireless communications},
  author = {Chia-Lung Lin and Rong-Jie Liu and Chih-Lung Chen and Hsie-Chia Chang and Chen-Yi Lee},
  year = {2016},
  doi = {10.1109/ASSCC.2016.7844204},
  url = {http://dx.doi.org/10.1109/ASSCC.2016.7844204},
  researchr = {https://researchr.org/publication/LinLCCL16-0},
  cites = {0},
  citedby = {0},
  pages = {337-340},
  booktitle = {IEEE Asian Solid-State Circuits Conference, A-SSCC 2016, Toyama, Japan, November 7-9, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-3700-1},
}