FPUx: High-Performance Floating-Point Support for Cost-Constrained RISC-V Cores

Xian Lin, Heming Liu, Xin Zheng 0001, Huaien Gao, Shuting Cai, Xiaoming Xiong. FPUx: High-Performance Floating-Point Support for Cost-Constrained RISC-V Cores. IEEE Trans. VLSI Syst., 32(10):1945-1949, October 2024. [doi]

Authors

Xian Lin

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Heming Liu

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Xin Zheng 0001

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Huaien Gao

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Shuting Cai

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Xiaoming Xiong

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