FPUx: High-Performance Floating-Point Support for Cost-Constrained RISC-V Cores

Xian Lin, Heming Liu, Xin Zheng 0001, Huaien Gao, Shuting Cai, Xiaoming Xiong. FPUx: High-Performance Floating-Point Support for Cost-Constrained RISC-V Cores. IEEE Trans. VLSI Syst., 32(10):1945-1949, October 2024. [doi]

Abstract

Abstract is missing.