Transistor-level layout of high-density regular circuits

Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly. Transistor-level layout of high-density regular circuits. In Gi-Joon Nam, Prashant Saxena, editors, Proceedings of the 2009 International Symposium on Physical Design, ISPD 2009, San Diego, California, USA, March 29 - April 1, 2009. pages 83-90, ACM, 2009. [doi]

@inproceedings{LinMM09,
  title = {Transistor-level layout of high-density regular circuits},
  author = {Yi-Wei Lin and Malgorzata Marek-Sadowska and Wojciech Maly},
  year = {2009},
  doi = {10.1145/1514932.1514954},
  url = {http://doi.acm.org/10.1145/1514932.1514954},
  tags = {layout},
  researchr = {https://researchr.org/publication/LinMM09},
  cites = {0},
  citedby = {0},
  pages = {83-90},
  booktitle = {Proceedings of the 2009 International Symposium on Physical Design, ISPD 2009, San Diego, California, USA, March 29 - April 1, 2009},
  editor = {Gi-Joon Nam and Prashant Saxena},
  publisher = {ACM},
  isbn = {978-1-60558-449-2},
}