Sheng-En David Lin, Partha Pratim Pande, Dae-Hyun Kim. Optimization of dynamic power consumption in multi-tier gate-level monolithic 3D ICs. In 17th International Symposium on Quality Electronic Design, ISQED 2016, Santa Clara, CA, USA, March 15-16, 2016. pages 29-34, IEEE, 2016. [doi]
@inproceedings{LinPK16,
title = {Optimization of dynamic power consumption in multi-tier gate-level monolithic 3D ICs},
author = {Sheng-En David Lin and Partha Pratim Pande and Dae-Hyun Kim},
year = {2016},
doi = {10.1109/ISQED.2016.7479152},
url = {http://dx.doi.org/10.1109/ISQED.2016.7479152},
researchr = {https://researchr.org/publication/LinPK16},
cites = {0},
citedby = {0},
pages = {29-34},
booktitle = {17th International Symposium on Quality Electronic Design, ISQED 2016, Santa Clara, CA, USA, March 15-16, 2016},
publisher = {IEEE},
isbn = {978-1-5090-1213-8},
}