Power-efficient and slew-aware three dimensional gated clock tree synthesis - researchr publication authors

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Minghao Lin, Heming Sun, Shinji Kimura. Power-efficient and slew-aware three dimensional gated clock tree synthesis. In 2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016. pages 1-6, IEEE, 2016. [doi]

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