A 10-Gb/s Eye-Opening Monitor Circuit for Receiver Equalizer Adaptations in 65-nm CMOS

Yu-Chuan Lin, Hen-Wai Tsao. A 10-Gb/s Eye-Opening Monitor Circuit for Receiver Equalizer Adaptations in 65-nm CMOS. IEEE Trans. VLSI Syst., 28(1):23-34, 2020. [doi]

@article{LinT20,
  title = {A 10-Gb/s Eye-Opening Monitor Circuit for Receiver Equalizer Adaptations in 65-nm CMOS},
  author = {Yu-Chuan Lin and Hen-Wai Tsao},
  year = {2020},
  doi = {10.1109/TVLSI.2019.2935305},
  url = {https://doi.org/10.1109/TVLSI.2019.2935305},
  researchr = {https://researchr.org/publication/LinT20},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {28},
  number = {1},
  pages = {23-34},
}