A 10-Gb/s Eye-Opening Monitor Circuit for Receiver Equalizer Adaptations in 65-nm CMOS

Yu-Chuan Lin, Hen-Wai Tsao. A 10-Gb/s Eye-Opening Monitor Circuit for Receiver Equalizer Adaptations in 65-nm CMOS. IEEE Trans. VLSI Syst., 28(1):23-34, 2020. [doi]

Abstract

Abstract is missing.