Optimal layout of hexagonal minimum spanning trees in linear time [VLSI]

Guo-Hui Lin, Guoliang Xue. Optimal layout of hexagonal minimum spanning trees in linear time [VLSI]. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 633-636, IEEE, 2000. [doi]

@inproceedings{LinX00a,
  title = {Optimal layout of hexagonal minimum spanning trees in linear time [VLSI]},
  author = {Guo-Hui Lin and Guoliang Xue},
  year = {2000},
  doi = {10.1109/ISCAS.2000.858831},
  url = {https://doi.org/10.1109/ISCAS.2000.858831},
  researchr = {https://researchr.org/publication/LinX00a},
  cites = {0},
  citedby = {0},
  pages = {633-636},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings},
  publisher = {IEEE},
}