Routability-Driven TSV-Aware Floorplanning Methodology for Fixed-Outline 3-D ICs

Jai-Ming Lin, Jung-An Yang. Routability-Driven TSV-Aware Floorplanning Methodology for Fixed-Outline 3-D ICs. IEEE Trans. on CAD of Integrated Circuits and Systems, 36(11):1856-1868, 2017. [doi]

@article{LinY17-11,
  title = {Routability-Driven TSV-Aware Floorplanning Methodology for Fixed-Outline 3-D ICs},
  author = {Jai-Ming Lin and Jung-An Yang},
  year = {2017},
  doi = {10.1109/TCAD.2017.2695900},
  url = {https://doi.org/10.1109/TCAD.2017.2695900},
  researchr = {https://researchr.org/publication/LinY17-11},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {36},
  number = {11},
  pages = {1856-1868},
}