A low power and ultra high reliability LDPC error correction engine with Digital Signal Processing for embedded NAND Flash Controller in 40nm COMS

Wei Lin, Shao-Wei Yen, Yu-Cheng Hsu, Yu-Hsiang Lin, Li-Chun Liang, Tien-Ching Wang, Pei-Yu Shih, Kuo-Hsin Lai, Kuo-Yi Cheng, Chun-Yen Chang. A low power and ultra high reliability LDPC error correction engine with Digital Signal Processing for embedded NAND Flash Controller in 40nm COMS. In Symposium on VLSI Circuits, VLSIC 2014, Digest of Technical Papers, Honolulu, HI, USA, June 10-13, 2014. pages 1-2, IEEE, 2014. [doi]

Authors

Wei Lin

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Shao-Wei Yen

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Yu-Cheng Hsu

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Yu-Hsiang Lin

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Li-Chun Liang

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Tien-Ching Wang

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Pei-Yu Shih

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Kuo-Hsin Lai

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Kuo-Yi Cheng

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Chun-Yen Chang

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