High Speed Soft-Error-Tolerant Latch and Flip-Flop Design for Multiple VDD Circuit - researchr publication

researchr

You are not signed in
Sign in
Sign up

Saihua Lin, Huazhong Yang, Rong Luo. High Speed Soft-Error-Tolerant Latch and Flip-Flop Design for Multiple VDD Circuit. In 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), May 9-11, 2007, Porto Alegre, Brazil. pages 273-278, IEEE Computer Society, 2007. [doi]

Abstract is missing.

runs on WebDSL