Saihua Lin - researchr alias

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Viewing Publication 1 - 9 from 9

2009

Pi Coil: A New Element for Bandwidth ExtensionSaihua Lin, Dawei Huang, Simon Wong. tcas, 56-II(6):454-458, 2009. [doi]

2008

A New Family of Sequential Elements With Built-in Soft Error Tolerance for Dual-VDD SystemsSaihua Lin, Huazhong Yang, Rong Luo. tvlsi, 16(10):1372-1384, 2008. [doi]

A capacitive boosted buffer technique for high-speed process-variation-tolerant interconnect in UDVS applicationSaihua Lin, Yu Wang, Rong Luo, Huazhong Yang. aspdac 2008: 304-309 [doi]

2007

High Speed Soft-Error-Tolerant Latch and Flip-Flop Design for Multiple VDD CircuitSaihua Lin, Huazhong Yang, Rong Luo. isvlsi 2007: 273-278 [doi]

A Novel Low Power Interface Circuit Design Technique for Multiple Voltage Islands SchemeSaihua Lin, Huazhong Yang, Rong Luo. iscas 2007: 1401-1404 [doi]

A Novel gamma d/n, RLCG Transmission Line Model Considering Complex RC(L) LoadsSaihua Lin, Huazhong Yang, Rong Luo. tcad, 26(5):970-977, 2007. [doi]

2006

Low Clock Swing D Flip-Flops Design by Using Output Control and MTCMOSSaihua Lin, Hongli Gao, Huazhong Yang. patmos 2006: 486-495 [doi]

Worst Case Crosstalk Noise Effect Analysis in DSM Circuits by ABCD ModelingSaihua Lin, Huazhong Yang. patmos 2006: 504-513 [doi]

A 0.9V 10GHz 71µW Static D Flip-flop by using FinFET DevicesSaihua Lin, Rong Luo, Huazhong Yang, Hui Wang. apccas 2006: 1795-1798 [doi]

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