A 2.5-Gb/s DLL-Based Burst-Mode Clock and Data Recovery Circuit With 4× Oversampling

Jung-Mao Lin, Ching-Yuan Yang, Hsin-Ming Wu. A 2.5-Gb/s DLL-Based Burst-Mode Clock and Data Recovery Circuit With 4× Oversampling. IEEE Trans. VLSI Syst., 23(4):791-795, 2015. [doi]

Abstract

Abstract is missing.