Using FPLs to Implement a Reconfigurable Highly Parallel Computer

Arne Linde, Tomas Nordström, Mikael Taveniku. Using FPLs to Implement a Reconfigurable Highly Parallel Computer. In Herbert Grünbacher, Reiner W. Hartenstein, editors, Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping, Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31 - September 2, 1992, Selected Papers. Volume 705 of Lecture Notes in Computer Science, pages 199-210, Springer, 1992.

@inproceedings{LindeNT92,
  title = {Using FPLs to Implement a Reconfigurable Highly Parallel Computer},
  author = {Arne Linde and Tomas Nordström and Mikael Taveniku},
  year = {1992},
  researchr = {https://researchr.org/publication/LindeNT92},
  cites = {0},
  citedby = {0},
  pages = {199-210},
  booktitle = {Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping, Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31 - September 2, 1992, Selected Papers},
  editor = {Herbert Grünbacher and Reiner W. Hartenstein},
  volume = {705},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {3-540-57091-8},
}