Circuit Partitioned Automatic Test Pattern Generation Constrained by Three-State Buses and Restrictors

J. Th. van der Linden, M. H. Konijnenburg, A. J. van de Goor. Circuit Partitioned Automatic Test Pattern Generation Constrained by Three-State Buses and Restrictors. In 5th Asian Test Symposium (ATS 96), November 20-22, 1996, Hsinchu, Taiwan. pages 29-33, IEEE Computer Society, 1996. [doi]

Authors

J. Th. van der Linden

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M. H. Konijnenburg

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A. J. van de Goor

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