FPGA PLB Architecture Evaluation and Area Optimization Techniques Using Boolean Satisfiability

Andrew C. Ling, Deshanand P. Singh, Stephen Dean Brown. FPGA PLB Architecture Evaluation and Area Optimization Techniques Using Boolean Satisfiability. IEEE Trans. on CAD of Integrated Circuits and Systems, 26(7):1196-1210, 2007. [doi]

@article{LingSB07,
  title = {FPGA PLB Architecture Evaluation and Area Optimization Techniques Using Boolean Satisfiability},
  author = {Andrew C. Ling and Deshanand P. Singh and Stephen Dean Brown},
  year = {2007},
  doi = {10.1109/TCAD.2007.891362},
  url = {http://dx.doi.org/10.1109/TCAD.2007.891362},
  tags = {optimization, architecture, C++},
  researchr = {https://researchr.org/publication/LingSB07},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {26},
  number = {7},
  pages = {1196-1210},
}