A Low-Area, Low-Power, and Low-Leakage Error-Detecting Latch for Timing-Error Resilient System Designs - researchr publication authors

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Chien-Tung Liu, Zhe-Wei Chang, Shih-Nung Wei, Jinn-Shyan Wang, Tay-Jyi Lin. A Low-Area, Low-Power, and Low-Leakage Error-Detecting Latch for Timing-Error Resilient System Designs. In 31st IEEE International System-on-Chip Conference, SOCC 2018, Arlington, VA, USA, September 4-7, 2018. pages 1-6, IEEE, 2018. [doi]

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