Xiaoqing Liu, Anping He, Caihong Li, Guangbo Feng, Jilin Zhang. Study of 64-bit booth asynchronous multiplier based on FPGA. In Yajie Qin, Zhiliang Hong, Ting-Ao Tang, editors, 12th IEEE International Conference on ASIC, ASICON 2017, Guiyang, China, October 25-28, 2017. pages 263-266, IEEE, 2017. [doi]
@inproceedings{LiuHLFZ17,
title = {Study of 64-bit booth asynchronous multiplier based on FPGA},
author = {Xiaoqing Liu and Anping He and Caihong Li and Guangbo Feng and Jilin Zhang},
year = {2017},
doi = {10.1109/ASICON.2017.8252463},
url = {https://doi.org/10.1109/ASICON.2017.8252463},
researchr = {https://researchr.org/publication/LiuHLFZ17},
cites = {0},
citedby = {0},
pages = {263-266},
booktitle = {12th IEEE International Conference on ASIC, ASICON 2017, Guiyang, China, October 25-28, 2017},
editor = {Yajie Qin and Zhiliang Hong and Ting-Ao Tang},
publisher = {IEEE},
isbn = {978-1-5090-6625-4},
}