Yifang Liu, Jiang Hu, Weiping Shi. Multi-scenario buffer insertion in multi-core processor designs. In David Z. Pan, Gi-Joon Nam, editors, Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008. pages 15-22, ACM, 2008. [doi]
Abstract is missing.