An Area-Efficient, Conflict-Free, and Configurable Architecture for Accelerating NTT/INTT

Si-Huang Liu, Chia-Yi Kuo, Yannan Mo, Tao Su. An Area-Efficient, Conflict-Free, and Configurable Architecture for Accelerating NTT/INTT. IEEE Trans. VLSI Syst., 32(3):519-529, March 2024. [doi]

Authors

Si-Huang Liu

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Chia-Yi Kuo

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Yannan Mo

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Tao Su

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