An Area-Efficient, Conflict-Free, and Configurable Architecture for Accelerating NTT/INTT

Si-Huang Liu, Chia-Yi Kuo, Yannan Mo, Tao Su. An Area-Efficient, Conflict-Free, and Configurable Architecture for Accelerating NTT/INTT. IEEE Trans. VLSI Syst., 32(3):519-529, March 2024. [doi]

@article{LiuKMS24,
  title = {An Area-Efficient, Conflict-Free, and Configurable Architecture for Accelerating NTT/INTT},
  author = {Si-Huang Liu and Chia-Yi Kuo and Yannan Mo and Tao Su},
  year = {2024},
  month = {March},
  doi = {10.1109/TVLSI.2023.3336951},
  url = {https://doi.org/10.1109/TVLSI.2023.3336951},
  researchr = {https://researchr.org/publication/LiuKMS24},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {32},
  number = {3},
  pages = {519-529},
}