Optimize FPGA-Based Neural Network Accelerator with Bit-Shift Quantization

Yu Liu, Xuejiao Liu, Luhong Liang. Optimize FPGA-Based Neural Network Accelerator with Bit-Shift Quantization. In IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020. pages 1-5, IEEE, 2020. [doi]

Abstract

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