Parallelizing SRAM arrays with customized bit-cell for binary neural networks

Rui Liu, Xiaochen Peng, Xiaoyu Sun, Win-San Khwa, Xin Si, Jia-Jing Chen, Jia-Fang Li, Meng-Fan Chang, Shimeng Yu. Parallelizing SRAM arrays with customized bit-cell for binary neural networks. In Proceedings of the 55th Annual Design Automation Conference, DAC 2018, San Francisco, CA, USA, June 24-29, 2018. ACM, 2018. [doi]

Authors

Rui Liu

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Xiaochen Peng

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Xiaoyu Sun

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Win-San Khwa

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Xin Si

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Jia-Jing Chen

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Jia-Fang Li

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Meng-Fan Chang

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Shimeng Yu

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