Bosheng Liu, Ying Wang, Zhiqiang You, Yinhe Han, Xiaowei Li. A signal degradation reduction method for memristor ratioed logic (MRL) gates. IEICE Electronic Express, 12(8):20150062, 2015. [doi]
@article{LiuWYHL15,
title = {A signal degradation reduction method for memristor ratioed logic (MRL) gates},
author = {Bosheng Liu and Ying Wang and Zhiqiang You and Yinhe Han and Xiaowei Li},
year = {2015},
url = {https://www.jstage.jst.go.jp/article/elex/12/8/12_12.20150062/_article},
researchr = {https://researchr.org/publication/LiuWYHL15},
cites = {0},
citedby = {0},
journal = {IEICE Electronic Express},
volume = {12},
number = {8},
pages = {20150062},
}