A new write-contention based dual-port SRAM PUF with multiple response bits per cell

Chao Qun Liu, Yue Zheng, Chip-Hong Chang. A new write-contention based dual-port SRAM PUF with multiple response bits per cell. In IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017. pages 1-4, IEEE, 2017. [doi]

@inproceedings{LiuZC17-8,
  title = {A new write-contention based dual-port SRAM PUF with multiple response bits per cell},
  author = {Chao Qun Liu and Yue Zheng and Chip-Hong Chang},
  year = {2017},
  doi = {10.1109/ISCAS.2017.8050700},
  url = {https://doi.org/10.1109/ISCAS.2017.8050700},
  researchr = {https://researchr.org/publication/LiuZC17-8},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017},
  publisher = {IEEE},
  isbn = {978-1-4673-6853-7},
}