Reliable Logic Circuits with Byte Error Control Codes: A Feasibility Study

Jien-Chung Lo, Masato Kitakami, Eiji Fujiwara. Reliable Logic Circuits with Byte Error Control Codes: A Feasibility Study. In 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 1996, Boston, MA, USA, November 6-8, 1996. pages 286-294, IEEE Computer Society, 1996. [doi]

Abstract

Abstract is missing.