Jakub Lojda, Jakub Podivinsky, Zdenek Kotásek. Fault Tolerance Properties of Systems Generated with the Use of High-Level Synthesis. In 2018 IEEE East-West Design & Test Symposium, EWDTS 2018, Kazan, Russia, September 14-17, 2018. pages 1-7, IEEE, 2018. [doi]
Abstract is missing.