Nuno C. Lourenço, António Canelas, Ricardo Povoa, Ricardo Martins, Nuno Horta. Floorplan-aware analog IC sizing and optimization based on topological constraints. Integration, 48:183-197, 2015. [doi]
@article{LourencoCPMH15,
title = {Floorplan-aware analog IC sizing and optimization based on topological constraints},
author = {Nuno C. Lourenço and António Canelas and Ricardo Povoa and Ricardo Martins and Nuno Horta},
year = {2015},
doi = {10.1016/j.vlsi.2014.07.002},
url = {http://dx.doi.org/10.1016/j.vlsi.2014.07.002},
researchr = {https://researchr.org/publication/LourencoCPMH15},
cites = {0},
citedby = {0},
journal = {Integration},
volume = {48},
pages = {183-197},
}