Kerry S. Lowe, P. Glenn Gulak. Gate sizing and buffer insertion for optimizing performance in power constrained BiCMOS circuits. In Michael R. Lightner, Jochen A. G. Jess, editors, Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993, Santa Clara, California, USA, November 7-11, 1993. pages 216-219, IEEE Computer Society, 1993. [doi]
Abstract is missing.