A Low Power-Consumption Triple-Node-Upset-Tolerant Latch Design - researchr publication authors

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Yingchun Lu, Guangzhen Hu, Jianan Wang, Hao Wang, Liang Yao, Huaguo Liang, Maoxiang Yi, Zhengfeng Huang. A Low Power-Consumption Triple-Node-Upset-Tolerant Latch Design. J. Electronic Testing, 38(1):63-76, 2022. [doi]

This author has not been identified. Look up 'Yingchun Lu' in GoogleThis author has not been identified. Look up 'Guangzhen Hu' in GoogleThis author has not been identified. Look up 'Jianan Wang' in GoogleThis author has not been identified. Look up 'Hao Wang' in GoogleThis author has not been identified. Look up 'Liang Yao' in GoogleThis author has not been identified. Look up 'Huaguo Liang' in GoogleThis author has not been identified. Look up 'Maoxiang Yi' in GoogleThis author has not been identified. Look up 'Zhengfeng Huang' in Google

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