Ping Lu, Antonio Liscidini, Pietro Andreani. A 3.6 mW, 90 nm CMOS Gated-Vernier Time-to-Digital Converter With an Equivalent Resolution of 3.2 ps. J. Solid-State Circuits, 47(7):1626-1635, 2012. [doi]
@article{LuLA12,
title = {A 3.6 mW, 90 nm CMOS Gated-Vernier Time-to-Digital Converter With an Equivalent Resolution of 3.2 ps},
author = {Ping Lu and Antonio Liscidini and Pietro Andreani},
year = {2012},
doi = {10.1109/JSSC.2012.2191676},
url = {http://dx.doi.org/10.1109/JSSC.2012.2191676},
researchr = {https://researchr.org/publication/LuLA12},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {47},
number = {7},
pages = {1626-1635},
}