A 3.6 mW, 90 nm CMOS Gated-Vernier Time-to-Digital Converter With an Equivalent Resolution of 3.2 ps

Ping Lu, Antonio Liscidini, Pietro Andreani. A 3.6 mW, 90 nm CMOS Gated-Vernier Time-to-Digital Converter With an Equivalent Resolution of 3.2 ps. J. Solid-State Circuits, 47(7):1626-1635, 2012. [doi]

Abstract

Abstract is missing.