An efficient decoder architecture for cyclic non-binary LDPC codes

Yichao Lu, Guifen Tian, Satoshi Goto. An efficient decoder architecture for cyclic non-binary LDPC codes. In IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014. pages 397-400, IEEE, 2014. [doi]

Authors

Yichao Lu

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Guifen Tian

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Satoshi Goto

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