An efficient decoder architecture for cyclic non-binary LDPC codes

Yichao Lu, Guifen Tian, Satoshi Goto. An efficient decoder architecture for cyclic non-binary LDPC codes. In IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014. pages 397-400, IEEE, 2014. [doi]

@inproceedings{LuTG14,
  title = {An efficient decoder architecture for cyclic non-binary LDPC codes},
  author = {Yichao Lu and Guifen Tian and Satoshi Goto},
  year = {2014},
  doi = {10.1109/ISCAS.2014.6865149},
  url = {http://dx.doi.org/10.1109/ISCAS.2014.6865149},
  researchr = {https://researchr.org/publication/LuTG14},
  cites = {0},
  citedby = {0},
  pages = {397-400},
  booktitle = {IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014},
  publisher = {IEEE},
}