Efficient built-in redundancy analysis for embedded memories with 2-D redundancy

Shyue-Kung Lu, Yu-Chen Tsai, Chih-Hsien Hsu, Kuo-Hua Wang, Cheng-Wen Wu. Efficient built-in redundancy analysis for embedded memories with 2-D redundancy. IEEE Trans. VLSI Syst., 14(1):34-42, 2006. [doi]

Authors

Shyue-Kung Lu

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Yu-Chen Tsai

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Chih-Hsien Hsu

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Kuo-Hua Wang

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Cheng-Wen Wu

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