Guangyi Lu, Yuan Wang, Jian Cao, Song Jia, Ganggang Zhang, Xing Zhang. Novel gate-voltage-bias techniques for gate-coupled MOS (GCMOS) ESD protection circuits. In IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, China, October 28-31, 2013. pages 1-4, IEEE, 2013. [doi]
@inproceedings{LuWCJZZ13, title = {Novel gate-voltage-bias techniques for gate-coupled MOS (GCMOS) ESD protection circuits}, author = {Guangyi Lu and Yuan Wang and Jian Cao and Song Jia and Ganggang Zhang and Xing Zhang}, year = {2013}, doi = {10.1109/ASICON.2013.6811960}, url = {http://dx.doi.org/10.1109/ASICON.2013.6811960}, researchr = {https://researchr.org/publication/LuWCJZZ13}, cites = {0}, citedby = {0}, pages = {1-4}, booktitle = {IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, China, October 28-31, 2013}, publisher = {IEEE}, isbn = {978-1-4673-6415-7}, }