A Sub-200-mV Voltage-Scalable SRAM With Tolerance of Access Failure by Self-Activated Bitline Sensing

Shien-Chun Luo, Lih-Yih Chiou. A Sub-200-mV Voltage-Scalable SRAM With Tolerance of Access Failure by Self-Activated Bitline Sensing. IEEE Trans. on Circuits and Systems, 57-II(6):440-445, 2010. [doi]

@article{LuoC10-1,
  title = {A Sub-200-mV Voltage-Scalable SRAM With Tolerance of Access Failure by Self-Activated Bitline Sensing},
  author = {Shien-Chun Luo and Lih-Yih Chiou},
  year = {2010},
  doi = {10.1109/TCSII.2010.2048360},
  url = {http://dx.doi.org/10.1109/TCSII.2010.2048360},
  researchr = {https://researchr.org/publication/LuoC10-1},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on Circuits and Systems},
  volume = {57-II},
  number = {6},
  pages = {440-445},
}