Design Methodology for Yield Enhancement of Switched-Capacitor Analog Integrated Circuits

Pei-Wen Luo, Jwu-E Chen, Chin-Long Wey. Design Methodology for Yield Enhancement of Switched-Capacitor Analog Integrated Circuits. IEICE Transactions, 94-A(1):352-361, 2011. [doi]

@article{LuoCW11,
  title = {Design Methodology for Yield Enhancement of Switched-Capacitor Analog Integrated Circuits},
  author = {Pei-Wen Luo and Jwu-E Chen and Chin-Long Wey},
  year = {2011},
  url = {http://search.ieice.org/bin/summary.php?id=e94-a_1_352},
  tags = {design science, e-science, design},
  researchr = {https://researchr.org/publication/LuoCW11},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {94-A},
  number = {1},
  pages = {352-361},
}