Hui Luo, Youren Wang, Hua Lin, Yuanyuan Jiang. A New Optimal Test Node Selection Method for Analog Circuit. J. Electronic Testing, 28(3):279-290, 2012. [doi]
@article{LuoWLJ12,
title = {A New Optimal Test Node Selection Method for Analog Circuit},
author = {Hui Luo and Youren Wang and Hua Lin and Yuanyuan Jiang},
year = {2012},
doi = {10.1007/s10836-011-5274-z},
url = {http://dx.doi.org/10.1007/s10836-011-5274-z},
researchr = {https://researchr.org/publication/LuoWLJ12},
cites = {0},
citedby = {0},
journal = {J. Electronic Testing},
volume = {28},
number = {3},
pages = {279-290},
}