Hardware-accelerated Response Time Analysis for priority-preemptive Networks-on-Chip

Yunfeng Ma, Leandro Soares Indrusiak. Hardware-accelerated Response Time Analysis for priority-preemptive Networks-on-Chip. In 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2015, Bremen, Germany, June 29 - July 1, 2015. pages 1-8, IEEE, 2015. [doi]

@inproceedings{MaI15,
  title = {Hardware-accelerated Response Time Analysis for priority-preemptive Networks-on-Chip},
  author = {Yunfeng Ma and Leandro Soares Indrusiak},
  year = {2015},
  doi = {10.1109/ReCoSoC.2015.7238092},
  url = {http://dx.doi.org/10.1109/ReCoSoC.2015.7238092},
  researchr = {https://researchr.org/publication/MaI15},
  cites = {0},
  citedby = {0},
  pages = {1-8},
  booktitle = {10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2015, Bremen, Germany, June 29 - July 1, 2015},
  publisher = {IEEE},
  isbn = {978-1-4673-7942-7},
}