Analog Design for a Power Transmission Line Sensing and Analysis VLSI Chip - researchr publication authors

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Erik MacLean, Vijay K. Jain. Analog Design for a Power Transmission Line Sensing and Analysis VLSI Chip. In 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2010, Kyoto, Japan, October 6-8, 2010. pages 438-446, IEEE Computer Society, 2010. [doi]

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